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74AUP2G14DW-7
RoHS 
RoHS compliant
RoHS compliantPackage 6-TSSOP, SC-88, SOT-363
Category Logic - Gates and Inverters / Logic - Gates and Inverters
Description
R-PDSO-G6 74AUP Tape & Reel (TR) AUP/ULP/V logic gate circuit 5.4ns @ 3.3V 30pF 1.1mm 4mA 4mA 3.6V
PDF
Buying Options
Total Price: USD $0.4
Unit Price: USD $0.4048
≥1 USD $0.4048
≥10 USD $0.30712
≥100 USD $0.277024
≥500 USD $0.191488
≥1000 USD $0.161251
≥3000 USD $0.131032
Inventory: 3008
Minimum: 1
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Technical Details
Supply Chain
Factory Lead Time 17 Weeks
Physical
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-TSSOP, SC-88, SOT-363
Weight 6.010099mg
Dimensions
Height Seated (Max) 1.1mm
Compliance
RoHS Status ROHS3 Compliant
Technical
Operating Temperature -40°C~125°C
Packaging Tape & Reel (TR)
Published 2013
Series 74AUP
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Terminal Finish Matte Tin (Sn)
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) NOT SPECIFIED
Number of Functions 2
Supply Voltage 1.2V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G6
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 0.8V
Number of Circuits 2
Propagation Delay 5.4 ns
Quiescent Current 500nA
Turn On Delay Time 37.3 ns
Family AUP/ULP/V
Number of Inputs 1
Current - Output High, Low 4mA 4mA
Logic Type Inverter
Max Propagation Delay @ V, Max CL 5.4ns @ 3.3V, 30pF
Logic Level - Low 0.1V ~ 0.88V
Logic Level - High 0.6V ~ 2.29V
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